It is well known in communications equipment to provide circuit cards which can be inserted into and removed from shelves of an equipment rack, the insertion of a card establishing electrical connections thereto and these connections being broken on removal of the card. The connections include connections to power supply lines from a power supply unit of the equipment shelf or rack. Each card can include voltage regulators for regulating voltages derived from the power supply lines to levels desired for operation of electronic circuits on the card. It is desirable that the voltage drop, and consequent power loss, involved in the voltage regulation be as small as possible.
In order to permit continued operation of other cards of the equipment while a card is inserted or removed, it is desirable to permit so-called hot insertion and removal of cards, i.e. insertion and removal of a card during operation of the equipment with the power supply unit active and the power supply lines at their normal operating voltages. However, hot insertion or removal of a card presents a sudden increase or decrease, respectively, in the load connected to the power supply lines, which in turn results in transients on the power supply lines. The severity of transients which occur on hot insertion of a card can be reduced by providing a controlled turn-on of the load presented by the card. Transients which occur on hot removal of a card can not be reduced in practice in a similar manner.
These transients can cause faulty operation (so-called hits) in already operating cards, unless the transients are filtered out by the voltage regulators on the cards. As the transients include high frequency components, effective filtering by a voltage regulator requires that this have an all-stop frequency characteristic over a large bandwidth, for example of the order of 1.5 MHz. The filtering effect of the voltage regulators is also reduced with reduced regulator voltage drop, so that a compromise must be made between filtering and power loss.
It is well known to provide a voltage regulator in which a FET is used as the voltage regulating device. Typically, for a positive supply voltage an enhancement mode N-channel power MOS (metal-oxide-semiconductor) FET is used with its drain connected to the positive supply voltage and its source connected to the load. This is a common-drain or source-follower arrangement in which the output voltage supplied from the source to the load is determined by the voltage supplied to the gate of the FET. Operation of such an arrangement with a low drain-source voltage drop requires that the gate be supplied with a positive voltage greater than the positive supply voltage, necessitating the provision of an additional voltage supply line (which is itself subject to transients) or additional circuitry such as a voltage multiplier driven by a charge pump. Thus this arrangement, and its converse using a P-channel FET for a negative supply voltage, has disadvantages.
An alternative arrangement for a positive supply voltage is to use a P-channel FET with its source connected to the positive supply voltage and its drain connected to the load. This is a common-source arrangement which avoids the above disadvantage in that the gate can be supplied with a control voltage which is between the positive supply voltage and ground (to which the other side of the load is connected). However, voltage gain of the FET in this arrangement makes control of the FET more difficult.
More significantly, in this arrangement the apparent gate capacitance of the FET is considerably increased (being equivalent to the gate-source capacitance in parallel with the gate-drain capacitance multiplied by the voltage gain plus one), and this with the parasitic gate resistance results in a pole at a frequency typically of the order of 1 MHz (determined by 1/2.pi.RC, where R is the parasitic gate resistance, typically about 7.5 .OMEGA., and C is the apparent gate capacitance, typically about 22 nF). The control voltage for the gate of the FET is produced by a voltage comparison and feedback circuit which includes an integrating function, defining another pole of the control loop. For stability, especially in view of variations among FETs, this other pole must be at a frequency not more than about one-tenth of the gate capacitance-resistance pole frequency, and hence must be of the order of 100 kHz or less. The bandwidth of the control loop is thus limited to the order of 100 kHz, which is much less than is required.
It is also known to use a switching regulator to achieve voltage regulation, in which a FET is rapidly switched between saturated on and off states in a pulse width modulated manner. In this case the output of the FET is a switched voltage which must be subjected to smoothing and filtering to remove residual components at the switching frequency. Typically, such a switching regulator may be used in the equipment power supply unit to supply power to the power supply lines for distribution among the circuit cards as discussed above. The switching frequency can for example be of the order of 300 kHz, this being within the 1.5 MHz bandwidth desired of the voltage regulators on the circuit cards.
An object of this invention is to provide a voltage regulator which can provide an all-stop frequency characteristic over a large bandwidth with a low voltage drop without the disadvantages of the prior art as discussed above.